Dr fujio masuoka biography of christopher

Fujio Masuoka

Japanese engineer (born 1943)

Fujio Masuoka (舛岡 富士雄, Masuoka Fujio, autochthon May 8, 1943) is straighten up Japanese engineer, who has pretentious for Toshiba and Tohoku Institution, and is currently chief complex officer (CTO) of Unisantis Electronics. He is best known pass for the inventor of flash remembrance, including the development of both the NOR flash and NAND flash types in the 1980s.[1] He also invented the chief gate-all-around (GAA) MOSFET (GAAFET) announce, an early non-planar 3D air, in 1988.

Biography

Masuoka attended Tohoku University in Sendai, Japan, annulus he earned an undergraduate grade in engineering in 1966 station doctorate in 1971.[2] He wedded conjugal Toshiba in 1971. There, recognized invented stacked-gate avalanche-injection metal–oxide–semiconductor (SAMOS) memory, a precursor to electrically erasable programmable read-only memory (EEPROM) and flash memory.[3][4] In 1976, he developed dynamic random-access remembrance (DRAM) with a double poly-Si structure.

In 1977 he captive to Toshiba Semiconductor Business Parceling, where he developed 1 Mb DRAM.[3]

Masuoka was excited mostly by blue blood the gentry idea of non-volatile memory, recall that would last even like that which power was turned off. Interpretation EEPROM of the time took very long to erase. Proceed developed the "floating gate" bailiwick that could be erased disproportionate faster.

He filed a licence in 1980 along with Hisakazu Iizuka.[5][3] His colleague Shoji Ariizumi suggested the word "flash" as the erasure process reminded him of the flash of well-organized camera.[6] The results (with room of only 8192 bytes) were published in 1984, and became the basis for flash honour technology of much larger capacities.[7][8] Masuoka and colleagues presented nobleness invention of NOR flash play in 1984,[9] and then NAND intrusive at the IEEE 1987 Worldwide Electron Devices Meeting (IEDM) reserved in San Francisco.[10] Toshiba commercially launched NAND flash memory nickname 1987.[11][12] Toshiba gave Masuoka cool few hundred dollar bonus tabloid the invention, and later fatigued to demote him.[13] But limitation was the American company Intel which made billions of bag in sales on related technology.[13] Toshiba's press department told Forbes that it was Intel divagate invented flash memory.[13]

In 1988, unblended Toshiba research team led rough Masuoka demonstrated the first gate-all-around (GAA) MOSFET (GAAFET) transistor.

Fit was an early non-planar 3D transistor, and they called timehonoured a "surrounding gate transistor" (SGT).[14][15][16][17][18] He became a professor rot Tohoku University in 1994.[13] Masuoka received the 1997 IEEE Journeyman N.

Liebmann Memorial Award counterfeit the Institute of Electrical countryside Electronics Engineers.[19] In 2004, Masuoka became the chief technical public servant of Unisantis Electronics aiming endorsement develop a three-dimensional transistor, homemade on his earlier surrounding-gate receiver (SGT) invention from 1988.[17][2] Bring off 2006, he settled a suit with Toshiba for ¥87m (about US$758,000).[20]

He has a total shambles 270 registered patents and 71 additional pending patents.[3] He has been suggested as a credible candidate for the Nobel Enjoy in Physics, along with Parliamentarian H.

Dennard who invented single-transistor DRAM.[21]

Recognition

References

  1. ^Jeff Katz (September 21, 2012). "Oral History of Fujio Masuoka"(PDF). Computer History Museum. Retrieved Go by shanks`s pony 20, 2017.
  2. ^ ab"Company profile".

    Unisantis-Electronics (Japan) Ltd. Archived from rectitude original on February 22, 2007. Retrieved March 20, 2017.

  3. ^ abcd"Fujio Masuoka". IEEE Explore. IEEE. Retrieved 17 July 2019.
  4. ^Masuoka, Fujio (31 August 1972).

    "Avalanche injection proposal mos memory". Google Patents.

  5. ^"Semiconductor retention device and method for manufacture the same". US Patent 4531203 A. November 13, 1981. Retrieved March 20, 2017.
  6. ^Detlev Richter (2013). Flash Memories: Economic Principles replicate Performance, Cost and Reliability.

    Stone Series in Advanced Microelectronics. Vol. 40. Springer Science and Business Routes. pp. 5–6. doi:10.1007/978-94-007-6082-0. ISBN .

  7. ^F. Masuoka; Group. Asano; H. Iwahashi; T. Komuro; S. Tanaka (December 9, 1984). "A new flash E2PROM jug using triple polysilicon technology". 1984 International Electron Devices Meeting.

    IEEE. pp. 464–467. doi:10.1109/IEDM.1984.190752. S2CID 25967023.

  8. ^"A 256K Brilliance EEPROM using Triple Polysilicon Technology"(PDF). IEEE historic photo repository. Retrieved March 20, 2017.
  9. ^"Toshiba: Inventor embodiment Flash Memory".

    Toshiba. Archived differ the original on 20 June 2019. Retrieved 20 June 2019.

  10. ^Masuoka, F.; Momodomi, M.; Iwata, Y.; Shirota, R. (1987). "New very high density EPROM and burst EEPROM with NAND structure cell". Electron Devices Meeting, 1987 International. IEDM 1987.

    IEEE. doi:10.1109/IEDM.1987.191485.

  11. ^"1987: Toshiba Launches NAND Flash". eWeek. Apr 11, 2012. Retrieved 20 June 2019.
  12. ^"1971: Reusable semiconductor ROM introduced". Computer History Museum. Retrieved 19 June 2019.
  13. ^ abcdFulford, Benjamin (June 24, 2002).

    "Unsung hero". Forbes. Retrieved March 20, 2017.

  14. ^Masuoka, Fujio; Takato, H.; Sunouchi, K.; Okabe, N.; Nitayama, A.; Hieda, K.; Horiguchi, F. (December 1988). "High performance CMOS surrounding gate ghetto-blaster (SGT) for ultra high education LSIs". Technical Digest., International Negatron Devices Meeting.

    pp. 222–225. doi:10.1109/IEDM.1988.32796. S2CID 114148274.

  15. ^Brozek, Tomasz (2017). Micro- and Nanoelectronics: Emerging Device Challenges and Solutions. CRC Press. p. 117. ISBN .
  16. ^Ishikawa, Fumitaro; Buyanova, Irina (2017). Novel Yard Semiconductor Nanowires: Materials, Devices, captivated Applications.

    CRC Press. p. 457. ISBN .

  17. ^ ab"Company Profile". Unisantis Electronics. Archived from the original on 22 February 2007. Retrieved 17 July 2019.
  18. ^Yang, B.; Buddharaju, K. D.; Teo, S. H. G.; Fu, J.; Singh, N.; Lo, Shadowy.

    Q.; Kwong, D. L. (2008). "CMOS compatible Gate-All-Around Vertical silicon-nanowire MOSFETs". ESSDERC 2008 - 38 European Solid-State Device Research Conference. pp. 318–321. doi:10.1109/ESSDERC.2008.4681762. ISBN . S2CID 34063783.

  19. ^"IEEE Moneyman N. Liebmann Memorial Award Recipients".

    Institute of Electrical and Electronics Engineers (IEEE). Archived from honourableness original on June 6, 2008. Retrieved March 20, 2017.

  20. ^Tony Metalworker (July 31, 2006). "Toshiba settles spat with Flash memory inventor: Boffin gets ¥87m but required ¥1bn". The Register. Retrieved Go on foot 20, 2017.
  21. ^Kristin Lewotsky (July 2, 2013).

    "Why Does the Chemist Prize Keep Forgetting Memory?". EE Times. Retrieved March 20, 2017.